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Translation of Machine Vision Programs to Reconfigurable Computational
Network Control Codes
Clark F. Olson Master's Thesis, University of Washington, 1990. Parallel processing systems appear to be necessary in current and future vision architectures to gain the highest possible throughput. Such systems typically require much work to specify the interprocessor communications, algorithm partitioning, scheduling and other design issues. The Proteus system allows users to simply specify the algorithm; then the system completes the partitioning, scheduling and mapping itself, while providing tools such as a debugger and simulator to facilitate the writing of correct programs. This thesis presents the design and implementation of the task translator for the Proteus system. The task translator is responsible for parsing, linking, and partitioning the algorithm. The final output is a mapping of specific preassembled code onto individual processing elements in the reconfigurable network, with a set of control codes specifying the communication of data between processors, the input channels, and the output to the host. The parser uses primarily recursive-descent parsing techniques, but a form of shift-reduce (bottom-up) parsing is also used to efficiently parse expressions. The partitioning scheme is based on a greedy allocating algorithm that ensures approximate load balancing between the processors. |