# ---------------------------------------------------
# makefile for target advdiff.
#
#   GNUmakefile:  This works only with GNU Make
# ---------------------------------------------------

TARGET = advdiff
BINDIR = .

FC       = f90
F90      = f90
RM       = rm -f
MV       = mv -f

CLAW = ./claw
BLAS = ./dblas

F90FLAGS = $(OPTIMFLAG) -r8 -O3

F90FLAGS += \
	  -align dcommons \
	  -check bounds \
	  -check format \
	  -check output_conversion \
	  -check overflow \
	  -check underflow \
	  -warn argument_checking \
	  -fpconstant


# LOADLIBES   = -lnag -ldxml
LOADLIBES =
COMPILE.f90=$(F90) $(F90FLAGS) -I. -I$(BINDIR)
LINK.f90   =$(F90) $(F90FLAGS) $(LDFLAGS)
COMPILE.f  =$(COMPILE.f90)
LINK       =$(LINK.f90)

#
#  Files we don't have to build:
#
.PHONY:  GNUmakefile depends.mak $(TARGET).objs

#
#  The dependencies for $(TARGET) are in a special file:
#
include $(TARGET).objs

#
#  Pattern rules
#
vpath %.o $(BINDIR)

vpath %.f . $(CLAW)

%.o:: %.f
	$(COMPILE.f90) -c $< -o $@
	@echo -----------

%.o:: $(FORLIBS)/%.f
	$(COMPILE.f90) -c $< -o $@
	@echo -----------

%.o:: $(BLAS)/%.f
	$(COMPILE.f90) -c $< -o $@
	@echo -----------

%.o:: $(CLAW)/%.f
	$(COMPILE.f90) -c $< -o $@
	@echo -----------

%.o:: %.f90
	$(COMPILE.f90) -c $< -o $@
	@echo -----------

#
#  The real target rule to run, using the implicit rule above
#
$(TARGET) : $($(TARGET).objs)
	$(LINK) $(filter %.o, $^) $(LOADLIBES) -o $@
	-$(MV) *.o $(BINDIR)

cleanobj:
	-$(RM) $(BINDIR)/*.o core

cleansome:
	-$(RM) $(BINDIR)/*.x core *~

cleanall:
	-$(RM) *.o *.mod $(BINDIR)/*.x core *~ $(BINDIR)/*.o

#
#  Make a tags file for regexp replacements and searching
#
TAGS: $(wildcard *.f90) $(wildcard *.fi) $(wildcard *.objs)
	etags *.f90 *.fi *.objs

#
#  Dependencies of required object files:
#    (create these with ~stern/bin/mkdep)
#
include depends.mak
