EE 540, Winter 2012
Instructor: Mani Soma
EE 540: VLSI Testing (4 credits)
VLSI testing and design-for-test techniques, covering digital systems, mixed analog-digital systems, integrated sensor systems, and radio-frequency systems. Projects may include test algorithm design, testing of fabricated circuits, and parametric testing of state-of-the-art industry circuits. Prerequisite: EE 477 or EE 525 or permission of instructor.
The course grade will be assigned based on two progress reports during the quarter, one Final project report and a presentation at the end of the quarter.
Grading of each report takes into account: technical contents, presentation styles, clarity in explanations, spellings, etc.
Progress report 1 accounts for 20% of the total course grade and is a literature review of hardware security design and FPGA implementation, which is also the topic for the final project.
Progress report 2 accounts for 30% of the total course grade and is the Verilog design and simulation of the chosen hardware security method.
The Final report and presentation are on the implementation of FPGA hardware security using Altera Stratix IV FPGA as the platform. The final report and presentation account for 50% of the total course grade (40% for the report and 10% for the presentation).
All project works must be submitted electronically at the URL posted on the main class web site. No late assignment accepted.
NO INCOMPLETE GRADE WILL BE GIVEN IN THIS COURSE.
"VLSI Test Principles and Architectures: Design for Testability," by L.-T. Wang, C.-W. Wu, and X. Wen. This is the required course textbook.
IEEE Journals, Transactions, and Conference Proceedings (IEEExplore or ENGR Library).
Books at ENGR library
These and many other books are available at the ENGR Library for consultation as part of the course work. They are not on reserve.
Bardell, Paul H., William H. McAnney, Jacob Savir. Built-in test for VLSI : pseudorandom techniques. New York : Wiley, c1987. [TK7874 .B374 1987]
M. Abramovici, M.A. Breuer, and A.D. Friedman. Digital Systems Testing and Testable Design , IEEE Press, Revised printing. [TK7874 .A23 1990]
Colin M. Maunder, Rodham E. Tulloss, eds. The Test access port and boundary-scan architecture. IEEE Computer Society Press, Los Alamitos, Calif., c1990. [TK7867 .T39 1990]
Mahoney, Matthew. Tutorial: DSP-based testing of analog and mixed-signal circuits. IEEE Computer Society Press ; Los Angeles, CA. [TK7895.A8 M34 1987]