CS372 - Computer Architecture
Crash Course - A Really Simple Computer
This is the start of a crash course in computer architecture at the Instruction
Set level. You will need to grasp the basic ideas in this crash course in order
to start building your SimpComp simulator. To get things started we use a really
simple computer - a 4-bit aritmetic unit (such as was found in early calculators)
in order to see the major elements of what goes into a computer. We will take a
look at the basic aspects of instructions sets and programming at the assembly
level in the below material. We will be discussing this in great detail in
class so don't worry if things are not obvious. What you should do, however,
is try to grasp, for yourself, the overall picture of this simple computer system.
CPU
Registers
The RSC has a minimal register set for doing simple arithmetic. The A register is
the accumulator. All arithmetic/logic operations store the results in this
register. The B register is the second operand. C is the carry bit, set by a
carry out from the accumulator. The F (flags) register consists of two bits, a
zero flag, set when the result in the accumulator is zero, and a negative flag, set
when the high order bit (bit 3) is set in the accumulator. These flags are here
for illustration.
The IP (instruction pointer) is a 4-bit index register pointing at the next instruction
to be loaded from memory. When the computer is first started this value is set
to zero (0000). The IR (instruction register) is where the instruction word and,
possibly, an auxillary word are loaded for execution. This register is 8 bits
wide and is divided into the opcode field (high order nybble) and the addr (address
field - low order nybble). The load order is the first nybble fetched from
memory is the opcode, the second, if one is fetched, is the address.
Instructions
The instruction set consists of 16 instructions as shown in the figure. The
instructions are given a mnemonic code in the table below.
| HEX |
MNEMONIC |
OPERANDS |
SEMANTICS |
| 0 |
NOP |
|
No operation |
| 1 |
LOAD |
A, ADDR |
A <- M[addr] |
| 2 |
LOAD |
B, ADDR |
B <- M[addr] |
| 3 |
STORE |
ADDR |
M[addr] <- A |
| 4 |
MOVE |
|
A <- B |
| 5 |
NEG |
|
A <- -A |
| 6 |
AND |
|
A <- A ^ B |
| 7 |
OR |
|
A <- A v B |
| 8 |
ADD |
|
A <- A + B |
| 9 |
JMP |
ADDR |
IP <- addr |
| A |
JMPC |
ADDR |
IF C, IP <- addr |
| B |
JMPZ |
ADDR |
IF Z, IP <- addr |
| C |
JMPN |
ADDR |
IF N, IP <- addr |
| D |
IN |
|
A <- input |
| E |
OUT |
|
output <- A |
| F |
HALT |
|
Stop execution |
ALU
The Arithmetic/Logic Unit consists of a simple 4-bit adder, a twos-complement
(negator) adjuster, a 4-bit AND and 4-bit OR operations.
Memory
Since the IP is only four bits wide the memory consists of an array of 16, 4-bit
wide words.
Assembly Language
A simple assembly language consists of the above instructions along with two
data formatting pseudo-instructions. The first pseudo-instruction, DW,
sets aside a single word of memory and puts an operand value into that location.
The second pseudo-instruction, RW, simply sets aside a word without
initializing the value of that word (except possibly to zero).
An assembly program consists of a fixed format
text file with the following format
See a sample program below.
Program Image
An image is the actual bit pattern of a program and its data, loaded in memory. An
image (or load) file is a hex representation (in plaintext) of that image
generated from the assembler program. The
format of an image file for this system will be a four-character line by four lines.
Here is an example image file assembled from the program below.
1C2D
583E
BBEF
3500
Sample Program
Source Program (unassembled)
LABEL OPCODE OPERANDS COMMENTS
--------------------------------------------------------------------
LOAD A, FIRST
LOAD B, SECOND
NEG
ADD
STORE ANSWER
JMPN DONE
OUT
DONE: HALT
FIRST: DW 3 ;reserves a word and sets it to 3
SECOND: DW 5 ; ditto for 5
ANSWER: RW ? ; reserves a single word of memory
Assembled Listing
See if you can follow the generated image in this listing file.
ADDRESS LABEL OPCODE OPERANDS IMAGE
-------------------------------------------------------------------
0 LOAD A, FIRST 1C
2 LOAD B, SECOND 2D
4 NEG 5
5 ADD 8
6 STORE ANSWER 3E
8 JMPN DONE BB
A OUT E
B DONE: HALT F
C FIRST: DW 3 3
D SECOND: DW 5 5
E ANSWER: RW ? 0